1. Field of the Invention
The present invention relates to computer systems. Specifically, the present invention relates to the configuration and control of a computer memory array and expansion memory arrays.
2. Related Art
Computer systems almost always contain some form of memory. This memory is typically organized in the form of a memory array with each addressable memory location in the array comprising a group of binary data bits of information. The number of data bits corresponding to a particular memory location defines the width of that memory location. In a typical computer system, a memory width of 8-bit bytes or 16-bit words is very common. Other memory widths such as 32-bit, 64-bit, and 128-bit wide memory locations are also used in many computer system applications. The width of memory arrays in other computer systems may use any arbitrary number of bits per memory location.
It is often convenient to configure a memory array with some locations of the array having a first width and other memory locations of the array having a second width different from the first width. Similarly, other computer systems may employ a variety of different memory widths. Memory arrays are configured using various widths in order to optimize the available storage for selected address blocks (ranges of addressable memory). This optimization may be used, for example, if a particular type of data of a given width is stored in a specified address block. In other situations, a particular address block may be constrained to a particular width in order to maintain compatibility of the computer system with other similar computer systems. In still other situations, a particular address block may physically reside in an expansion memory board different from the hardware used for main memory. It is convenient to provide the capability for expansion memory to be a variable width depending on the storage requirements for a particular computer system. In this manner, the cost of expansion memory may be optimized.
Other factors may contribute to the need for more than one width of memory locations in the memory array. These other factors include the speed of the memory devices, the availability of memory devices, the technology needed for a particular address block (dynamic random access memory or DRAM, static random access memory or SRAM, read only memory or ROM, complementary metal oxide semiconductor or CMOS, etc.), and the cost of a particular memory device.
Once a computer system supports multiple memory widths, the memory control function of the memory array becomes more difficult. The processor making access to the memory array must be aware of the width of the memory array being accessed. Moreover, a memory array controller must generate the appropriate timing and control signals corresponding to the appropriate memory width. In prior art computer systems, particularly personal computer systems, hardware jumpers are used in the memory array to define the width of memory locations at pre-determined address regions. For example, extended memory boards, available for many personal computer systems, contain hardware jumpers by which a user may configure the memory board for a 16-bit wide data word for greater efficiency or an 8-bit wide data byte for compatability with other systems. Once the jumpers are configured on the memory board, the user installs the memory board in the computer system and powers up the system for use. The jumpers on the memory board result in the generation of a memory control signal by the memory board to the processor or other computer system component that makes a memory access. This memory control signal, commonly called a MEMCS16 signal, defines whether or not the memory board can supply an 8-bit or a 16-bit data word on a memory access. The processor or other device making access to memory, therefore uses the MEMCS16 signal to define the number of data bits to receive.
Significant problems result if the jumpers on a memory board are improperly configured. In this case, an invalid MEMCS16 signal will be generated to the processor and an invalid memory access will result. Other problems are encountered when more than one expansion board is installed in a computer system. In this case, each expansion board may contain circuitry for independently driving the MEMCS16 signal. In some circumstances, the operation of two expansion boards may conflict in controlling the state of the MEMCS16 signal. This may occur if two expansion boards are mapped to the same memory space. This may also occur if an expansion board is mapped to an incompatible memory area such as a boot ROM area. An expansion board is mapped to an incompatible area if, for example, the expansion board is configured for 16-bit word accesses when the mapped area can only provide an 8-bit byte access. These expansion board conflicts may cause a seemingly properly configured expansion board to become inoperable when another expansion board is inserted into the computer system. Significant problems, traceable to the control of a memory width signal (MEMCS16), result from an improperly configured and controlled MEMCS16 signal or memory width control signal.
Thus, a better means for controlling a signal specifying the width of blocks of memory in a computer memory array is needed.